1. Field of the Invention
The present invention relates to a semiconductor device provided with a package, more particularly to a semiconductor device provided with a multilayer high-speed IC package in which an IC chip is carried on a multilayer insulative substrate.
2. Description of the Related Art
Many conventional semiconductor devices are provided with so-called high-speed IC packages in which IC chips for inputting and outputting various signals, including high-speed signals, are mounted on a multilayer insulative substrate.
In this kind of multilayer high-speed IC package, the major portions of the signal lines which connect the IC chip at the upper part of the IC package with the external terminals at the bottom part of the IC package extend vertically with respect to the IC package.
The length of the vertical portions of the signal lines increase when there are multiple layers of insulative substrates of the IC package and along with the increased thickness of the insulative substrate.
Usually, for the purpose of decreasing the load at the driving side for driving the IC chip, it is necessary to increase the characteristic impedance of the signal lines connected to the IC chip. Accordingly, it is necessary to increase the thickness of the insulative substrate, that is, the thickness of the insulative layers positioned at the two sides of the interlayer portions of the signal lines. That is, for the purpose of making the interlayer portions of the signal lines match the characteristic impedance of the signal lines, it is necessary that, when, for example, the interlayer portions are constructed as balanced strip lines (lines in which a ground surface is provided via insulative layers of a predetermined thickness and a predetermined dielectric constant for both sides of the interlayer portions), the thickness of the insulative layers at the two sides is tripled (for example, the thickness of the insulative plates at the two sides of the interlayer portions is made 1 mm to increase the characteristic impedance of the interlayer portions, for example, from 50 .OMEGA. to 75 .OMEGA.. In such a case, the transmission length of the vertical portions increases considerably. No particular techniques have conventionally been applied regarding the impedance characteristics of the vertical transmission lines.
With some of the signal lines connected to the IC chip, particularly, for example, high-speed signal lines, which may have bit rates of as high as one gigabit per second, the increase of the vertical transmission length can cause a significant impedance mismatch.
Further, in the conventional semiconductor device as mentioned above, crosstalk occurs between adjacent signals input and output through the adjacently arranged signal terminals. This becomes especially serious when the frequency of the signals becomes high, causing undesirable disturbances in the signal waveforms, and oscillation (especially in amplifier circuits).